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A holistic fast and parallel approach for accurate transient simulations of analog circuits
BENK, Janos - Personal Name
DENK, Georg - Personal Name
WALDHERR, Konrad - Personal Name
The accurate analog simulation of critical circuit parts is a key task in the R&D process of integrated circuits. With the increasing complexity of integrated circuits it is becoming cumulatively challenging to simulate in the analog domain and within reasonable simulation time. Previous speedup approaches of the SPICE (Simulation Program with Integrated Circuit Emphasis) analog circuit simulator included either solver improvements and speedup or model order reduction of the semiconductor devices. In this paper we present a comprehensive approach to significantly speedup a SPICE-based analog circuit simulator while keeping the single-rate characteristic of time domain simulations. The novelty of our approach consists in the combination and extension of existing approaches in a unique way, enabling fast transient partitioner that combines relevant aspects from circuit theory and linear algebra in a unifying way. This enables the construction of an efficient and parallel BBD (bordered block diagonal) solver. Furthermore, this BBD structure allows for intrinsic model order reduction of the partitions during the Newton iteration, transforming the Newton method to a Quasi-Newton method. For mid-sized and large-sized circuits our BBD approach leads to significant sequential and parallel accelerations of transient simulations. Additional speedup can be gained from our block-bypass strategies exploiting the latency in the partitioned circuit. Altogether our approach leads to a speedup of up to two orders of magnitude compared to the state-of-the-art KLU solver while maintaining SPICE-level accuracy
Availability
| EB00000003563K | Available |
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NONE
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Content Type
E-Jurnal
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Subject(s)
Transient analysis
SPICE
analog circuit simulation
circuit partitioning
differential-algebraic equations
Newton method
parallel numerics
numerical linear algebra
bordered block diagonal
Specific Detail Info
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Statement of Responsibility
Yuhan Guo, Gilles Goncalves, Tiente Hsu
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